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1. Field of the Invention The present invention relates to an electrically programmable read only memory device, and more particularly to an electrically programmable read only memory device having a specific structure for a highly integrated device. 2. Description of the Related Art In general, an electrically programmable read only memory (EPROM) device has the advantage that it is easily programmed but also has a disadvantage of the need for large power consumption. On the other hand, an electrically erasable programmable read only memory (EEPROM) device has the advantage that it is easy to erase data but also has a disadvantage of large power consumption. Thus, in order to realize a high density memory device having an ultra-high integration, the high density memory device requires a highly integrated cell having a reduced cell size. In the conventional art, the reduced cell size is achieved by using a floating gate transistor as a memory cell. However, as the cell size of a floating gate transistor is reduced, the coupling ratio between the floating gate and the control gate is significantly degraded, so that a writing operation of the device becomes difficult. To solve this problem, an embodiment of the present invention adopts a memory cell using a diode or MIM (Metal Insulator Metal) device. FIG. 1 is a cross-sectional view of a conventional diode memory device. As shown in FIG. 1, a diode memory device comprises a cell region A including a p-type semiconductor substrate 1, a gate insulation layer 3 formed on the substrate 1, and a control gate 4 formed on the gate insulation layer 3. Also, the diode memory device comprises a p-type well region 2 formed on the substrate 1, a source region 5 formed in the substrate 1 at a position opposite to the control gate 4 with a predetermined distance therebetween, and a drain region 6 formed in the substrate 1 at a position opposite to the source region 5. The source region 5 and drain region 6 are formed by diffusing a p-type impurity into the substrate 1. The diode memory device also comprises an insulation layer 7 formed on the control gate 4 and the substrate 1, a contact region 9 formed between the drain region 6 and the control gate 4, and an impurity diffused region 8 formed in the substrate 1 at a position opposite to the contact region 9. The impurity diffused region 8 is formed by diffusing an n-type impurity into the substrate 1. Here,
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For a complete list of recommended hardware specifications see our recommended PC specifications. The minimum specifications to play the game are: Windows Vista, DirectX 9, 2 GB RAM, 500 MB RAM Video Card, 128 MB VRAM, and 4GB HDD. Additional Notes: - The patch has been released to service the vast majority of the issues that have been posted by members of the community since the game was launched on Steam. - At launch, the game ran very well on the recommended PC specifications. However, we have encountered reports that players are experiencing several